Leadership leans in on customer outcomes over benchmarks while still flexing big performance numbers
– Ben Wodecki/SDxCentral
The broadest set of compute engines in the industry. A generation ahead of the rest.
Claims by AMD’s compute SVP Dan McNamara about its Venice CPU design are indicative of a company looking to defend its crown. Made ahead of its formal unveiling at a press and analyst conference in Las Vegas, McNamara and the wider AMD team backed Venice to not only capture the agentic AI demand but fend off encroaching competition.
The two-day showcase provided all the details hardware lovers could ask for on the new Zen 6C microarchitecture: improved core density, fine-tuned distributed schedulers to boost horsepower in backend execution, and lower-latency operating points for customers deploying at higher frequencies.
For the numbers minded reader
– AMD
But from a broader market-dynamics perspective, AMD’s Epyc event saw it come out guns blazing about why it should remain the market-leading CPU vendor amid Nvidia’s apparent positioning of its Vera CPU as “purpose-built for agentic AI.”
The core message from McNamara and other senior executives on site was going beyond performance stats and instead meeting customer needs in addition to agentic workloads as being the more integral task – while still also capturing that lucrative emerging market.
“Agents are doing all kinds of things; they’re running all kinds of workloads. They’re running electronic design automation (EDA) workloads. They’re running customer relationship management (CRM) workloads. They’re running HPC … you require compute that can support the broad set of workloads very effectively,” Madhu Rangarajan said on day one.
McNamara himself put it more simply: “Our goal there is to build the broadest set of compute engines for the industry to enable multiple workloads and the diversity of the infrastructure that’s needed.”
Purpose built … for variety
– Ben Wodecki/SDxCentral
Benchmark performance stats were a key talking point for AMD during its Advancing AI event in the summer, touting Venice as having 2.2 times better throughput than Nvidia’s challenger line.
During his keynote, McNamara even said that benchmarks “are one thing. It’s really about what are the outcomes for your customer.”
Such comments are noteworthy given the InferenceMAX (now InferenceX) debacle in which the chip giant was lampooned by SemiAnalysis; a benchmark result it clearly took to heart, with leaders like AI software VP Anush Elangovan leading the company’s rebuttal.
Responding to an SDxCentral probe around benchmark performance figures, Elangovan too toed the party line on being customer-outcome driven: “Benchmarks are a good point in time to check where we are. Live benchmarks are embedded. Multiple points to check, but I think we should just be focused on execution rates.”
“We want to look at it as system-level, outcome-based results that may not be captured well by a benchmark, but we’re okay with the benchmarks too,” Elangovan continued. “But more importantly, we’re also taking this to a point where we are now optimizing generation n-plus one, n-plus two already with the software being ready for those generations. So that allows us to co-design much, much earlier in the cycle.”
For all the talk of benchmarks not being all that, though, AMD used its two-day showcase to show off numbers for just how good its 9006 series server CPUs were on benchmarks like SPECint for integer processing performance, Stream for memory bandwidth, and High-Performance LINPACK (HPL) for floating-point computing performance in HPC – the latter being the core metric for ranking the Top500.
Arguably the most intrinsic performance metric cited over the two days was that the next-gen Venice line supports 2.8x more agents in agentic sandboxes “versus the competition.”
‘Benchmarks are great. Getting products to market are great, but most importantly, the goal is to enable our customers’ innovation’ – Dan McNamara
– Ben Wodecki/SDxCentral
The two-day showcase then was AMD essentially flexing its CPU muscles, cutting a confident figure despite shifting market forces.
In McNamara’s view, the fifth-generation Turin was AMD’s fastest-ramping CPU to date, citing strong demand from both enterprise platforms and third-party public-cloud instances. But in his view, the next-generation CPU could address data-center costs and constraints through server consolidation or, using his own words, by handling more users (or agents) per watt, per rack, per server, to save power.
“If you think about it, from a power standpoint, almost 3x the agents per watt versus the competition. And of course, data center space. We’ve talked a lot about sort of our density and throughput for many, many years. And with 512 threads, we are a market leader there.”
Ravi Kuppuswamy, SVP and GM of server product and engineering, was more uncharacteristically blunt than the AMD voices across its EPYC event: “Turin, with its core count, is essentially a winner with respect to agent sandboxes because it provides twice that number of threads … Turin was the reigning champion [but there’s a new king in town … Venus is the best agentic AI CPU, and it’s not one CPU; it is a portfolio that services agentic AI needs.”